Successive Approximation Register Analog-to-Digital Converter (SAR ADC) for Biomedical Applications

Table 2

Comparison between different configurations of the comparators.

Configurations	Single-stage dynamic latch comparator	Two-stage dynamic latch comparator	Three-stage dynamic latch comparator	Multistage dynamic latch comparator
No. of transistor	Least	Moderate	High	Highest
Area	Small	Moderate	Large	Largest
Power consumption	Very low	Moderate	High	Highest
Speed	Very low	Low	High	Moderate
Kick-back noise	High	Low	Moderate	Very low
Offset voltage	Highest	Moderate	Low	Very low